Current Density-Voltage (J-V) Characterization of Monolithic Nanolaminate Capacitors

In a world of miniaturized electronics, there is a rapidly increasing need for reliable, efficient, and compact energy storage systems with low-loss dielectrics. To address this need, this work proposes the development of compact, micro-capacitive energy storage devices that are compatible with IC processing such that they can be integrated monolithically on-chip. There are two main approaches for the fabricated integrated on-chip micro-supercapacitor energy storage devices: interdigitated electrode (IDE) devices and parallel plate electrode (PPE) devices. As part of the design of such systems, this work aims to explore the current density-voltage (J-V) behavior in homogeneous and heterogeneous IDE and PPE devices and to investigate whether the anomalies between the interfaces of the dielectric materials in such structures deleteriously affects their leakage current. Understanding the J-V characteristics in these structures is crucial in the design of a solid-state capacitor energy storage module with high energy densities, low-loss dielectrics, improved areal capacitance density, and a high number of charge/discharge cycles for portable power electronics. Specifically, this paper will explore and investigate nanolaminate, solid-state PPE and IDE capacitive energy storage “modules”, which can be fabricated using nanolithographic techniques. The dielectric layers in these structures will be composed of alternating nanolaminate layers of thin higher-k Al₂O₃, HfO₂, TiO₂, ZrO₂, Si₃N₄ and lower-k SiO₂. Recent findings have shown that capacitive energy storage devices made from a large number of these on-chip multilayer nanolaminate energy storage PPE (MNES-PPE) structures that utilize the directional interfacial anomalies of thin high-k/SiO₂ nanolaminates could have the potential to overcome many of the limitations of current compact energy storage technologies. Preliminary projections indicate that these high-density nanolaminate capacitors with laminate thicknesses from 2-5 nm could produce devices with volumetric energy densities and areal capacitive densities that are much larger than conventional micro-supercapacitors (~20 J/cm³).