NVPE: An FPGA-Based Non-Volatile Processor Emulator for Intermittent Computing

Research on novel memory storage devices that occupy less physical area and are compatible with CMOS processes, such as resistive RAM, has led to the interesting study of non-volatile compute memories and devices. The advent of these low-compromise non-volatile cells invites the opportunity for fully non-volatile microprocessors that are capable of rapid shutdown and startup. This class of microprocessors would be beneficial to intermittent computing systems applications that wait until an energy-harvesting device has sufficient energy available before they do some useful work due to requiring less energy to power down safely. Prior work has demonstrated the emulation of these non-volatile memories that enable the rapid testing of non-volatile memory systems. In this work, we expand on these ideas by introducing a framework that is capable of emulating fully functional non-volatile microprocessors based on individual non-volatile flip-flops, rather than larger addressable non-volatile memory blocks. Our proposed system enables the conversion and emulation of conventional systems into non-volatile equivalents. The proposed architecture is integrated into the open-source RISC-V microprocessor implementation ‘Potato’ and synthesized on a Xilinx Ultrascale+ XCZU5EV FPGA. The area overhead for the proposed emulator is 22 slice registers and 17 LUTs per emulated non-volatile flip-flop. As a case study, an AES block cipher is executed throughout power-down and power-up sequences. The system is shown to properly emulate the complex overhead operations resulting from sensitive power-down and power-up sequences in power-intermittent systems, providing a vital metric for the non-volatile microprocessor's fidelity.