Engineering Hysteresis in MoS₂ Transistors

Two-dimensional (2D) semiconducting materials such as monolayer MoS₂ are promising candidates for next-generation electronic and optoelectronic applications thanks to their atomic thickness immue to short-channel effects. Yet the high surface-to-volume ratios also make their electronic functionalities sensitive to surrounding environments. One significant manifestation of this sensitivity is the hysteresis effect observed in the transfer curves of the 2D field-effect transistors (FETs). Stable hysteresis windows could contribute to a class of essential electronic components known as charge storage devices. This report introduces two strategies to enable stable hysteresis in MoS₂ transistors: (1) By dimensionality transformation, monolayer MoS₂ can be rolled up into quasi-1D nanoscrolls, where the high-curvature surface exhibits an electric-field enhancement effect, and the open-ended hollow structures can accommodate solvent molecules as charge trapping centers, forming miniaturized memories with sub-microsecond writing/erasing capabilities. (2) By combining core-shell quantum dots (QDs) with monolayer MoS₂, a memory device with a floating-gate-like structure can be formed, the hysteresis window of which significantly depends on the QD structure and allows for long-term storage with minute charge loss (<25%) over 10 years. These inovative findings could pave the way for the development of 2D semiconductors-based memory devices that harness both long retention times and fast writing/erasing operations.