EventsThe 1st International Online Conference on Imaging
Published
This submission belongs to the session S2. Computer Vision and Pattern Recognition of the event The 1st International Online Conference on Imaging
Published date
30 Oct, 2026
Academic Editor
author-avatarCosimo Distante
Citation
Fangyuan Yao, Harris Sik-Ho Tsang, Richard Tai-Chiu Hsung, Wai-Lun Lo, Kwok-Wai Wong, Tony Yulin Zhu, Xiaoxing Yang, Ziyin Huang, Yui-Lam Chan, A Lightweight, Fast and Efficient YOLO-Based Model for PCB Defect Detection, in Proceedings of The 1st International Online Conference on Imaging, 4 November–6 November 2026, MDPI: Basel, Switzerland
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A Lightweight, Fast and Efficient YOLO-Based Model for PCB Defect Detection

Fangyuan Yao 1
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Kwok-Wai Wong 1
Xiaoxing Yang 1
Ziyin Huang 2
Yui-Lam Chan 3
1. Department of Computer Science, Hong Kong Chu Hai College, Hong Kong, China
2. Undergraduate School of Artificial Intelligence, Shenzhen Polytechnic University, Shenzhen, China
3. Department of Electrical and Electronic Engineering, The Hong Kong Polytechnic University, Hong Kong, China
Abstract

Automated Optical Inspection (AOI) plays a critical role in modern printed circuit board (PCB) manufacturing. However, conventional deep learning frameworks often struggle with high false-positive rates and substantial computational overhead, limiting their viability for seamless deployment on resource-constrained edge hardware. In this paper, we propose a lightweight, fast, and efficient YOLOv8-based model for PCB defect detection. The core objective is to achieve a practical compromise between processing throughput and detection accuracy in real-time production lines.

To enhance spatial adaptability and capture intricate structural variations in defects without bloating the model size, we integrate an enhanced deformable convolutional module from DCNv4 into the backbone network. This deformable convolutional module helps adjust the receptive field dynamically, which allows the model to effectively adapt to irregular defect geometries. Furthermore, to reduce memory traffic and computational complexity, a Cross Stage Partial with Partial Convolution (CSPPC) module is introduced into the neck architecture for parameter reduction. This structural refinement significantly reduces redundant feature computations while maintaining a streamlined data flow during inference.

We evaluate our proposed model on an open-source PKU-Market-PCB dataset. Experimental results demonstrate that our architecture successfully reduces the parameter count by 12.6% (from 3.01M to 2.63M) and lowers computational complexity by 7.4% (from 8.1 GFLOPs to 7.5 GFLOPs) compared to YOLOv8. Crucially, the model overcomes lightweight design trade-offs by simultaneously improving speed and accuracy. Specifically, it achieves a 2.2% relative improvement in precision (from 92.9% to 94.9%), a 1.4% relative gain in recall (from 80.1% to 81.2%), a 0.9% relative increase in mAP50 (from 87.4% to 88.2%), and a 3.7% increase in inference speed (from 137 FPS to 142 FPS). Our proposed model outperforms standard baselines in both deployment efficiency and reliability, as seen in RT-DETR. These results validate our model as a highly balanced, viable solution for edge-based industrial inspection systems.

Keywords
Automated Optical Inspection
Deformable Convolution
Partial Convolution
PCB Defect Detection
YOLOv8
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