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Design and Analysis of Three-Phase 3L-ANPC Inverter for Electric Traction
* 1 , 2 , 3
1  University of Catania, Department of Electrical electronic and computer engineering, Via Santa Sofia, 95123, Catania, Italy
2  STMicroelectronics, Stradale Primo Sole 50, 95121, Catania , Italy
3  University of Catania, Department of Electrical electronic and computer engineering, Via Santa Sofia, 95123, Catania, Italy
Academic Editor: Antonio J. Marques Cardoso

Abstract:

Long battery charging times is one of the main limits that are currently hindering the widespread adoption of EVs. This issue can be overcome by pursuing solutions with increased charging voltage involving 800 V DC buses. At the same time, traction electric drives are required to feature high efficiency, compactness, a high power density, high reliability and low weight. GaN technology presents a promising opportunity to achieve this target. The use of multilevel inverters is thus imperative to combine the exploitation of this technology with charging voltages above the breakdown voltages of GaN devices. Among multilevel converters topologies, Active Neutral Point Clamped (ANPC) offers the best distribution of switching and conduction devices' losses.

The main aim of this work is to present the design of a modular prototype for a 11kW three-phase 3L-ANPC inverter based on 650 V GaN HEMT devices for electric traction applications. The design consists of a main board comprising the DC bus, DC sensor and the AC output connectors; a chip board with GaN devices, decoupling capacitors and RC snubbers to limit Drain-to-Source overvoltages; a chip board with the driving circuits; and two control boards with optical fiber receivers and STM32 microcontrollers, respectively. The design was carried out by considering a modular approach, which allowed us to choose different control device approaches (with optics or with microcontroller) and different GaN devices’ packages. Moreover, the modularity allowed us to exploit the main board to realize other multilevel topologies by simply redesigning the chip boards.

A further analysis was carried out in such a way as to valuate the parasitics in the overall layout. Design and analysis results will be shown and explained in more detail in the presentation.

Low parasitics allow us to exploit the switching performances of GaN HEMTs, increasing the performance of the multilevel inverter in terms of output distortions and power losses.

Keywords: Gallium Nitride (GaN) devices; multilevel power converters; high-efficiency drives; electric traction
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