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Evaluating Stresses in the SiO2 Thin Films Using Molecular Dynamics Simulations
* 1 , 2 , 2 , 2
1  Joint School of Nanoscience and Nanoengineering
2  Joint School of Nanoscience and Nanoengineering, North Carolina A & T State University, Greensboro, USA
Academic Editor: Elisabeta Szerb


Semiconductor electronics transform the landscape of computing, communication, energy harvesting, automobiles, biotechnology, and other electronic devices. This transformation is brought about by the ability to sense, receive, manipulate, and transmit data from the diverse systems of vertical stacks of semiconductor layers and microdevices. Though the discrete design details of each semiconductor may be extremely complex, the fundamental processing steps of each semiconductor device align well with the photolithography procedure. When these semiconductor layers are stacked using photolithography, the signal noise between the device features and layers is restricted by passivation or dielectric insulation provided by SiO2 layers. Depending on the type of functionality and data sensing mechanism of semiconductors, SiO2 layers have an intended fitness for their purpose. The purpose of SiO2 layers can be segregated as an encapsulation of the semiconductor device, making part of the semiconductor layer inert, i.e., passivated, creating a hard mask to prevent an impact of the subsequent process like ion implantation or diffusion, insulating a part of the layer as in intermetallic dielectric or gate dielectric or to improve adhesion of the subsequent deposition.

The functionality of adhesion of SiO2 is by far been a less studied area. The adhesive characteristics of SiO2 for subsequent deposition and the thickness of SiO2 affect the stress distribution. Stresses due to SiO2 thin film, which could be a few nanometers to a few microns thick depending on the functionality, are modeled in this research. The stresses in SiO2 films may cause delamination or discontinuity affecting the performance and reliability of the optical or semiconductor devices they are built into. The classical molecular dynamics (MD) simulation technique is employed to investigate the stress characteristics of deposited films by leveraging the outcomes of atomistic modeling. A cluster made of fused silica is employed as the substrate. For the SiO2 deposition process simulation, silicon atoms with high energies and low-energy oxygen atoms are injected. This model is carefully controlled to ensure the stoichiometry conditions. This analysis uses open-source code LAMMPS (Large-scale Atomic/Molecular Massively Parallel Simulator) and Ovito (Open Visualization) tool. The research in this paper is focused on the SiO2 thin-film simulation to validate the analytical and experimental stress.

Keywords: Semiconductor electronics, SiO2 deposition, Passivation, gate dielectric, Stresses, LAMMPS, Ovito