The circuit realization of fractional neural models is a well-known and essential approach in neuromorphic computing, advanced encryption methods, intelligent robotics, self-tuning control, and massively parallel computation, among other areas. Indeed, a crucial step toward moving such applications forward in real-world scenarios is the electronic implementation of neural networks. However, fractional-order Hopfield neural networks (FO-HNNs), with and without memristors, pose two main issues for circuit implementation. The first is that FO-HNNs rely on hyperbolic tangent activation functions, which lead to bulky and cumbersome hardware implementations. As the second issue, FO-HNNs require, on the one hand, frequency-approximation methods to emulate a fractional capacitor in analog circuit designs. But those methods suffer from equilibrium points and memory inconsistencies. On the other hand, FPGA and ARM hardware require appropriate numerical methods to address the inherent memory requirements of fractional derivatives.
Both issues limit the applications of FO-HNNs. Therefore, in this talk, we present two novel approaches for achieving feasible, robust, and efficient implementation of FO-HNNs. To address the first problem, a novel approach employing piecewise-linear activation functions, rather than complex hyperbolic functions, is discussed. To address the second drawback, a new decomposition method is applied to obtain a semi-analytical solution for FO-HNNs. Similar to the Adomian approach, the Caputo-based fractional-order differential equation describing the underlying system is decomposed into n-pwl subsystems without explicit nonlinearities. As a result, we obtain an algorithm with low computational complexity, optimized simulation time, and no massive amounts of generated data, in contrast to standard numerical approaches such as Adams-Bashforth-Moulton and short-memory Grunwald-Letnikov. Based on the results and comparisons presented, both the piecewise-linear activation function and decomposition are excellent choices for the experimental realization of memristive and nonmeristive FO-HNNs, offering low hardware complexity, reduced form factor, and the fewest electronic components.