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Rapid and Facile Fabrication of Wafer Scale Silicon Hierarchical Structures with Broadband Ultra High Anti-Reflection Property
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1  Amity Institute of Nanotechnology, Amity University, Noida, UP, India
2  UQ Development Fellow School of Pharmacy The University of Queensland Queensland, Australia Phone: +610426008500


Nanostructuring of Silicon surface has perceived exponential growth over time due to its high demanding properties like superhydrophobicity and high anti-reflection [1]–[3]. Especially hierarchical structures (combination of micro- and nano- structures) on Silicon with significantly increased surface area has demonstrated enhanced optical and surface wettability properties, making it highly suitable for applications like self-cleaning, solar cell, photoluminescence, contamination prevention, etc [3]–[5]. Various techniques like vapour-liquid-solid (VLS), reactive ion etching (RIE), electrochemical etching and wet anisotropic electroless etching have been optimised for  micro- and nanostructuring over Silicon surface [5]–[9]. Methods like VLS and RIE are expensive and complicated. Wet electrochemical and electroless etching processes are simpler but electrochemical etching gives a very non-uniform porous structure and electroless etching only gives rise to microstructure and is also dependent on the orientation of Silicon surface. Nanostructuring of Silicon wafers using metal assisted etching has also been reported which is a rapid process [4], [10]. However, this process only results in the formation of nanostructured Silicon. There are reports where wet chemical etching and metal assisted etching process have been combined to realize hierarchical structures on Silicon but it does require longer time and large area uniformity in the formation of hierarchical structures is unpredictable [3], [11]. 

In this work, for the first time we propose an extremely fast and facile electroless method of fabricating hierarchical structures on Silicon wafer covering a large area. Added major benefits to this proposed method is that complete wafer can be textured within 3 to 8 minutes time span and is not dependent on the orientation or doping concentration of Silicon.

The unpolished side of a commercial Silicon wafer having grooved cup shaped microstructures on it was used as the base to deposit silver (Ag) nanoparticles electrolessly. After the Ag nanoparticle deposition for varied time between 30 s to 2 min, the Silicon wafer was etched for different time duration (1 min to 7 min) in dilute mixture of Hydrofluoric acid (HF) and Hydrogen peroxide (H2O2). Eventually the Ag nanoparticles were etched away in dilute Nitric acid leaving behind the hierarchical structures of Silicon unaffected. Pyramidal shaped microstructured Si surface was also used for deposition of Ag nanoparticles followed by a similar processing as mentioned above.

Diffused optical reflectance measurement on the hierarchical structured Silicon showed significant reduction by 46% in comparison to plane polished Silicon. Moreover insignificant variation in reflectance was observed over a broad wavelength range of 300 nm to 1400 nm.

It is concluded that such facile large area processing of hierarchical anti-reflecting structures on Si can be extremely beneficial for optical applications using Silicon.


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Keywords: silicon, hierarchical structure, nanostructure, anti-reflection, optical property