As semiconductor integrated circuits continue to miniaturize, the chip plane miniaturization process under Moore's Law has gradually approached the limit, making the demand for high-density integration processes increasingly urgent in the field of semiconductor integrated circuits. To further improve the integration density as well as the performance and function of chips and systems, researchers have been attempting to continue the development of Moore's Law through 3D heterogeneous integration, by integrating a variety of materials like wide-band semiconductors and novel nanomaterials as well as stacking multiple types of functional devices in 3D direction. In recent years, wafer bonding technology has rapidly emerged as a promisingly pivotal solution for achieving heterogeneous integrated chips and systems with high-density interconnection and high-performance. Wafer bonding technology refers to closely connect two smooth and clean wafers together by different physical or chemical methods to assist semiconductor manufacturing processes or to form heterogeneous composite wafers with specific functions. Currently, wafer bonding technology has extensively penetrated various application fields such as microelectronics, power electronics, memories, photonics, optoelectronic integration, heterogeneous integration and advanced packaging, achieving some significant research progresses. With the continuous advancement of technology and the increasing demands, the application scope of wafer bonding technology will further expand, injecting new impetus into innovative developments across various domains. In this report, different wafer bonding methods and mechanisms will be introduced in details, such as the permanent bonding/temporary bonding, wafer level bonding/die to wafer bonding, direct bonding/indirect bonding and hybrid bonding, etc. Also, some results in our recent work will be shared about successfully developed direct bonding processes between various materials at low temperature, which greatly reduces the thermal stress and crystal deformation caused by high temperature between heterogeneous materials, making it possible to attain high-yield wafer bonding between large-size heterogeneous materials with ultra-thin atomic scale interfaces.
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Wafer Bonding Technology for 3D Heterogeneous Integration Applications
Published:
23 November 2024
by MDPI
in 2024 International Conference on Science and Engineering of Electronics (ICSEE'2024)
session Microelectronics (Miniaturized Electronic Devices and Systems, Silicon Chips, and Integrated Circuits)
Abstract:
Keywords: wafer bonding technology, heterogeneous integration, 3D stacked integration, optoelectronic integration