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Fabrication and TCAD Optimization for a SiC Trench MOSFET with Intergrated TJBS
1  School of Integrated Circuit Science and Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China.
Academic Editor: Ying Tan

Abstract:

We fabricated a prototype for SiC trench MOSFET with intergrated trench Junction Barrier Schottky Diode (TJBS) to realize low reverse on-state voltage drop (VR_on) and low switching power loss under different temperatures. A TJBS is integrated at the sidewall of a trench nearby the gate trench to inactivate the PN body diode, which not only reduces VR_on, but also eliminates the conductance modulation effect during the free-wheeling state. Thus, the reverse recovery charge will not increase with the increase of temperature, which ensures that the reverse recovery loss for the free-wheeling diode and turning-on loss (Eon) for the nearby MOSFET almost remain unchanged under high temperature operation. The fabricated SiC trench MOSFET with cell pitch of 8 um shows a Ron,sp of 5.95 mΩ·cm2 and VR_on of 2.6 V at 300 A/cm2. Further TCAD optimization based on the measured data shows that a low Ron,sp of 2.52 mΩ·cm2 and VR_on of 2.04 V can be obtained when shrinking the cell pitch to 5 um. Compared with a simulated CoolSiCTM MOSFET, the proposed SiC trench MOSFET shows that Eon and turning-off loss (Eoff) at 25 °C are reduced by 32.8% and 80.7%, respectively. The total power loss is reduced by 54.5% to 61.8% when temperature increases from 25 °C to 175 °C.

Keywords: SiC trench MOSFET; integrated trench JBS; low reverse on-state voltage drop; low switching loss

 
 
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