Railway signaling is a critical component of ensuring the safe and efficient operation of train systems. The preparation of signaling control (interlocking) tables, which outline a specific signaling logic for controlling signals, switches, and track section vacancy, can be a complex and time-consuming task. These tables involve intricate logic, considering train positions, speeds, and potential conflicts within each possible train route. The generation of control tables for small railway stations can be performed manually relatively quickly, but the complexity of the work grows exponentially with the topology of the corresponding railway station, making it more susceptible to possible errors.

To reduce or even eliminate the possible errors in generating control tables, various studies and articles on automatic generation and verification have been presented in the literature, using different formal tools like EURIS, Ladder logic, Petri Nets (PNs), RailML, Controlled Natural Language (CNL), Maple, B-method, Gröbner Bases (GBs), Abstract State Machines (ASMs), Finite State Machines (FSMs), etc. All the examined papers assumed that the topological layout of a specific railway station had to be prepared manually using dedicated input tools. However, substantial progress was achieved only when the topology of the specific railway station was generated in the corresponding graphical editor before generating the control table itself, which brings a specific level of automation to the whole process.

This paper will present a methodology for the generation of station control tables using the MATHEMATICA package directly from the AutoCAD station signaling layout. This is usually prepared as the first step in the design of a railway signaling system for specific railway stations.