Quantum computing is poised to reshape the landscape of modern computation by offering exponential advantages in domains such as cryptography, optimization, and intelligent data processing. To realize the full potential of quantum systems, especially in fault-tolerant and Noisy Intermediate-Scale Quantum (NISQ) environments, it is essential to design quantum circuits that are both resource-efficient and resilient to errors. This paper presents a novel design of a Binary-Coded Decimal (BCD) to Excess-3 code converter circuit using only the Clifford+T gate set, a universal gate library widely supported on current quantum hardware. Our approach replaces conventional 4-bit reversible adder-based implementations with an optimized logic design based on Clifford+T-decomposed Peres gates. The use of Temporary Logical-AND gates and CNOT operations significantly reduces the T-count, circuit depth, and quantum cost—key metrics for fault-tolerant quantum computation. The circuit is simulated using IBM Qiskit, and functional verification across all valid BCD inputs confirms the correctness of the design. Beyond its core arithmetic function, the converter has broader implications in AI-oriented quantum architectures, where low-latency and low-error arithmetic operations are vital. This work contributes a scalable, fault-tolerant, and hardware-compatible building block for quantum logic, paving the way for practical and resource-aware quantum circuits in future AI-enhanced quantum systems.