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DESIGN OF LOW POWER PHASE LOCKED LOOP
* 1 , * 2 , * 3 , 4 , 5
1  Koneru Lakshmaiah Education Foundation, Guntur, India.
2  Associate Professor, Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Guntur, India.
3  Associate Professor, Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, KL Deemed to be University, Vaddeswaram, Andhra Pradesh, India
4  Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Guntur, India.
5  Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Guntur, India
Academic Editor: Aravind Rajeswary

Published: 13 March 2023 by MDPI in Holography Meets Advanced Manufacturing session Industry Applications
Abstract:

The phase-locked loop is am important system that has contributed significantly to technological advancements in many applications in the ever so fast-evolving digital era. In this paper, a PLL is designed using 90 nm CMOS technology node with 1.8V supply voltage. It features a PLL design with power consumption as low as 194.26µW with better transient analysis and DC analysis in an analog-to-digital environment. The proposed PLL design provides the best solution for many applications where a PLL is required due to its high performance but has to be accommodated in less area and low power consumption than state-of-the-art methods .

Keywords: Phase locked loop (PLL); Phase frequency detector; Charge pump; Low pass filter (LPF); Current starved voltage-controlled oscillator (CSVCO); Analog Digital environment (ADE).
Comments on this paper
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PLL can be constructed for both analogue and digital signal processing trap the cat. The Phase Locked Loop is a negative feedback control system that detects errors by comparing the phase and frequency of the input signal with the feedback signal.
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Yes Earl, PLL can definitely be both analog and digital. PLL usually has certain digital components like Flip flops or xor gates and analog components like loop filter, oscillators. AN all digital PLL has is discrete-time (sampled) in nature. It has a NCO instead of a VCO, and a digital loop filter. PLL can definitely be used for both analog and digital applications.
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Yes Earl, PLL can definitely be both analog and digital. PLL usually has certain digital components like Flip flops or xor gates and analog components like loop filter, oscillators. AN all digital PLL has is discrete-time (sampled) in nature. It has a NCO instead of a VCO, and a digital loop filter. PLL can definitely be used for both analog and digital applications.
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